Senior Layout Engineer

• Evaluate layout feasibility for circuit designs in collaboration with senior analog designers, considering design trade-offs and team input
• Create layouts for assigned analog blocks through floor planning, placement, and routing
• Perform DRC, ANT, LVS, PERC, EM, and IR verification checks to confirm layout quality
• Investigate layout tool and process features that can enhance productivity
• Provide regular status updates
• Participate in team meetings and share knowledge with the group

• Bachelor's degree in Electrical Engineering or a related field
• 5+ years of relevant industry experience
• Custom analog and mixed-signal layout design using deep-submicron CMOS devices, including FinFET transistors
• Collaboration within an existing team environment and constructive approach to team activities
• Communication and interpersonal skills for collaboration with cross-functional teams
• Custom layout design of analog and mixed-signal designs, including ADC, DAC, PLL, and SERDES
• Experience with industry-standard layout tools, including Cadence Virtuoso, Siemens Calibre, and Ansys Totem
• Experience applying layout design flows for advanced technology nodes

• Flexible work environment
• Employee-focused culture prioritizing individual growth, well-being, and belonging
• Accommodation measures for disabilities during the hiring process