RF Analog Layout Engineer

• Design layouts for high-frequency analog/RF blocks in FinFET technology
• Design layouts for RF circuits such as LNAs, mixers, VCOs, and PLL sub-blocks
• Optimize routing for high-frequency signals by minimizing parasitic capacitance and inductance
• Implement coaxial, differential, and ground shielding strategies to reduce coupling and crosstalk
• Address EM/IR reliability for high-current RF paths and comply with advanced DRC/LVS rules
• Apply matching techniques for RF differential pairs and passive components including inductors and capacitors
• Collaborate with RF designers to meet gain, noise figure, and phase noise targets
• Ensure compliance with color-aware routing and multi-patterning constraints for RF metal layers

• Hands-on experience in RF layout design at FinFET nodes
• Deep understanding of parasitic control for high-frequency circuits
• Familiarity with EM modeling, substrate coupling, and isolation techniques
• Proficiency in RF-aware EDA tools and post-layout simulation flows
• Knowledge of reliability and aging effects in RF devices and mitigation strategies
• Experience with RF sign-off flows and EM extraction tools (preferred)
• Ability to optimize layout for low phase noise and high linearity (preferred)
• Scripting skills for RF layout automation and verification (preferred)

• Health insurance from the first days, regardless of the probationary period
• Christmas holidays from 25 December to 31 December
• Cooperation with Superhumans center and Veteran HUB
• Psychological counseling provided by the Veteran Hub
• Internal policy making the company friendly to military and veterans